Electrically programmable fuses may be employed in semiconductor chips for a number of purposes including the storage of unalterable information for permanent memory, selection of a particular configuration from among many possible circuit configurations, optimization of the value of a particular analogue circuit component, optimization of overall circuit performance, and electronic replacement of defective circuit elements with redundant circuit elements. An electrical programmable fuse is also called an electrical fuse or an e-fuse.
Electrical fuses in a semiconductor chip may be programmed on a tester before packaging of the chip in an environment where a stable voltage supply is available, inside an operational computer where the voltage supply is less stable, or in hand held devices where the power source is often a battery with a wide range of voltage variations during the operation. The number of electrical fuses in a semiconductor chip may vary between a few fuses to millions of fuses. In most configurations where multiple fuses are employed, the electrical fuses are in an array format where the voltage supplies are shared among many fuses. The array may be addressable by a scan chain or by a row and column addressing scheme. By selecting a particular electrical fuse and allowing a sufficient amount of electrical current flow through the fuse, the fuse is “programmed.” Once the electrical fuse programs, the electrical resistance of the fuse changes and the sense circuit detects the change of the resistance to read the stored information.
An e-fuse array using a single ended sense scheme needs a reference voltage set to a level half way between a ‘1’ and ‘0’ bitline levels respectively, corresponding to programmed fuses and unprogrammed (intact) fuses. An e-fuse array has a plurality of fuse bitcells connected to a common bitline and forms a first input to a sense amplifier. A second input to the sense amplifier is the reference voltage and is ideally at a voltage half way between ‘1’ and ‘0’ bitline levels for equal ‘1’ and ‘0’ sense margin.
One problem with an e-fuse array is that leakage from unselected fuse bitcells lowers the voltage level on the bitline during sensing, and reduces the signal margin for the ‘1’, or programmed fuse state. The level of leakage current is sensitive to the programming pattern of the e-fuse array, and particularly to the fraction of the programmed fuses because programmed fuses effectively shut off a leakage current path, while unprogrammed fuses provide leakage paths. Thus, the sensing circuit with the single ended sense scheme suffers from programming pattern sensitivity in which the number of intact bitcells on a common bitline affects the signal margin for a selected bitcell.
The shift in the output voltage in the sense circuit due to the leakage current through the unprogrammed bitcells is proportional to the level of average leakage current through the bitcells. The level of the average leakage current is hardware-dependent, i.e., affected by the process variations in a manufacturing process. Because the level of the average leakage current has a statistical distribution due to the process variations during manufacturing, the net effect of the leakage current through the bitcells is a decrease in the sense margin of the sense circuit, thereby making an erroneous reading of the state of electrical fuses more likely, i.e., increasing the probability of a sensing error in the sensing circuit.
Such sensing errors are detrimental to the operation of an c-fuse array. In such cases, a stored data of ‘0’ may be read as ‘1’ or vice versa. A sense circuit that provides an enhanced sense margin without increasing the area of the sense circuit is desirable.